Sparse matrices and sparse vectors may be encoded to reduce storage requirements and to increase processing efficiency. For example, by storing only the non-zero elements of sparse matrices and sparse vectors, reductions in storage requirements may be realized. One example of such an encoding format is a compressed sparse row (CSR) encoding format. In some cases, the processing performance of an encoding format may be highly dependent on the architecture of the device that performs computations using sparse matrices and sparse vectors encoded in that format. For example, encoding formats that place all elements of a row of a sparse matrix contiguously in an encoded array, such as the CSR encoding format, may be processed inefficiently by a computation device that is capable of processing multiple rows of a sparse matrix in parallel. Additionally or alternatively, the computation device may require additional logic, wiring, and/or buffers to process such an encoding efficiently enough to fully leverage the communications interface bandwidth.